Introduction

NanoSpice is a new generation of high-capacity, high-performance parallel SPICE simulator. NanoSpice is designed for the mostchallenging simulation jobs, such as large post-layout analog circuit simulations requiring high capacity, speed and accuracy, all at the same time.

NanoSpice superior parallelization technologies enable efficient circuit simulation with up to 50 million circuit elements. This unique advantage of NanoSpice enables it to deliver better performance than other SPICE simulators for high precision simulation.Nanospice also features an innovative parallelization license model that offers a cost-effective choice for designers.

Key Advantage

Accuracy：Pure SPICE engine, following the highest industry standard

Capacity：Larger capacity than other SPICE without circuit reduction

Performance：2X+ faster than other solutions with the same precision

Compatibility：Standard input/output formats and fully compatible SPICE features

Foundry validated accuracy ：Proven in mature for 16/14/10/7/5nm FinFET & FD-SOI processes

Applications

Analog circuit, full customized digital circuit and mixed-signal circuit simulation and verification

Standard Cell characterization and verification

Memory circuits characterization and verification

Specification

• Supports HSPICE and Spectre netlist formats
• Supports all public domain models, user-defined models

-- MOSFET: BSIM3, BSIM4, BSIM-BULK, BSIM-IMG, BSIM-CMG,BSIM-SOI, LETI-UTSOI, PSP, HiSIM2, HiSIM_HV, EKV3

-- BJT: MAXTRAM, VBIC, HICUM; TFT: a-Si TFT, poly-Si TFT

-- Diode: JUNCAP, JUNCAP200, DIODE_CMC; Varactor: MOSVAR

-- Resistor: R2_CMC, R3_CMC; HEMT: ASM-HEMT；JFET/MESFET; TMI/Custom PMI; Bsource

• Full SPICE analysis features

-- OP, DC, AC, Noise, Transient, Trannoise, FFT, Sweep, Alter, Bisection Stability, Pole-Zero, MonteCarlo, DC Match, AC Match

• Supports Verilog-A (LRM2.4) and behavioral sources
• Supports VEC and VCD stimulus files
• Supports standard output formats for data analysis: FSDB, PSFASCII, SPICEASCII, ASCII, etc
• Supports S-parameter, Transmission line (W element, T element), IBIS model
• Supports SPEF, DSPF, DPF back-annotation
• Supports statistical analysis such as PVT, Monte Carlo, High Sigma
• Drop-in replacement of any SPICE simulator in existing design flows for any transistor-level circuit simulations
• Support public cloud platform, hybrid cloud and private cloud