NanoYield is a yield oriented design platform. Based on Primarius unique technology on statistical modeling and high-sigma analysis algorithm, it could achieve circuit statistical simulation with nondestructive precision acceleration through efficient algorithm and parallelization technology to analyze circuit yield and optimize design on memory, digital and analog circuits.
NanoYield could assist designers with the friendly GUI-based DFY (design for yield) environment–NDE (Nano Design Environment) in running variation analysis, predicting yield, to assess the yield and circuit Optimization based on the design goals to improve product competitiveness.
Full integration:Built-in SPICE engine and high efficient statistical algorithms
Superior performance:PVT/fast Monte Carlo/advanced High Sigma
Scalable parallelization:Near-linear scaling on both private farm or public clouds
Validated accuracy:Silicon validation in 14nm,7nm&5nm
Simplified licensing:Most economic parallelization licensing model
High sigma yield analysis for memory and standard cell designs
Fast MC and PVT analysis for analog and digital block designs
IC statistical analysis, design optimization and yield prediction
Foundries/IDMs technology development on SRAM yield
Supports Hspice and Spectre netlist formats
Full SPICE analysis features
Full SPICE model support
Full PVT and fast PVT analysis
Monte Carlo analysis
High sigma analysis (4-7σ+):100K+variables
System high sigma analysis for full chip yield analysis
Rich yield prediction and statistical circuit analysis functions,e.g.,sensitivity analysis, parameter sweeping,etc.
Powerful GUI-based circuit analysis features through NDE