NanoSpice Signal Integrity Solution
Dealing with jitter, crosstalk, ringing, ground bounce, and noise problems brought by tighter packaging space and increasing clock frequencies
Extensive SI models and analysis support
Designers can accurately and quickly predict signal integrity issues under such conditions
Superior simulation performance
Proven time-domain accuracy
Up to a thousand ports
Extensive & accurate model and element support, including IBIS/IBIS-AMI/nport/transmission lines
S-parameters, transmission lines, IBIS models, statistical eye analysis, etc.
Accurate Signal Integrity post-layout simulation
with transistor-level high speed IO circuit
Chip-package
co-simulation
Noise, Jitter,
Crosstalk analysis
of high-speed
serial interfaces
Package-Board-PDN network co-simulation
of memory chips
Large-scale DSPF post-simulation
Signal Integrity analysis